Vertical component with high-voltage strength

ABSTRACT

The invention concerns a vertical component with a four-layered structure comprising a thick lightly-doped zone ( 1 ) of a first type of conductivity providing the component voltage strength, enclosed with a peripheral wall ( 2 ) of a second type of conductivity extending vertically from one surface to the other of the component, and highly doped layer ( 3 ) of the second type of conductivity extending over the entire rear surface of the component. A lightly-doped layer ( 21 ) of the second type of conductivity extends over the entire surface of the component at the interface between the lightly-doped thick zone of the first type of conductivity and the highly-doped layer of the second type of conductivity.

The present invention relates to power components and more specificallyto peripheral structures providing a high breakdown voltage for thecomponents. The present invention more specifically aims at “four-layer”components, such as thyristors or triacs with a well-type structure.

FIG. 1 is a very simplified cross-section view of a well thyristorstructure formed from a lightly-doped N-type substrate 1. The thyristoris delimited by a P-type insulating wall 2. The rear surface isuniformly coated with a P-type layer 3. On the front surface side, aheavily-doped N-type region 5 forming the thyristor cathode is presentin a P-type well 4. An electrode (not shown) forms one piece with layer4 and forms the thyristor gate. An anode metallization A forms one piecewith the rear surface of the component and a cathode metallization K isformed on N+-type region 5. Conventionally, region 5 is provided withemitter short-circuits, that is, the N+ layer is interrupted in placesand metallization K is in contact with portions of P-type layer 4.

FIG. 2, shows in the same simplified way, the structure of a triac. Thistriac is formed from a lightly-doped N-type substrate 1 surrounded witha P-type doped insulating wall 2. The triac can be considered as beingformed of two thyristors in anti-parallel. The first thyristorsuccessively includes, from its anode to its cathode, lower layer 3,substrate 1, P-type well 4 and N+-type region 5. The second thyristorincludes, from its anode to its cathode, P-type well 4, substrate 1,P-type layer 3 and an N+-type region 7 formed on the lower surface sidesubstantially opposite to the portion of well 4 in which region 5 is notformed. As in the case of the thyristor of FIG. 1, a gate region and agate contact metallization (not shown) are provided on the upper surfaceside. A metallization A1 covers the rear surface. A metallization A2 isin contact with N+ region 5 and P well 4. Conventionally, regions 5 and7 are provided with emitter short-circuits.

The vertical structures of the various shown layers are optimized toobtain desired characteristics of the thyristor or of the triac,especially its sensitivity to voltage variations, sensitivity to currentvariations, on-state voltage drop, gate turn-on current threshold,breakdown voltage, etc.

However, the reverse biasing breakdown voltage is in practiceessentially determined by the component periphery, as will be discussedhereafter.

An object of the present invention is to improve this periphery tooptimize the breakdown voltage of a four-layer component such aspreviously described.

To achieve this and other objects, the present invention provides a4-layer structure vertical component including a thick lightly-dopedarea of a first conductivity type determining the breakdown voltage ofthe component, surrounded with a peripheral wall of the secondconductivity type vertically extending from one surface of the componentto the other, and a heavily-doped layer of the second conductivity typeextending over the entire rear surface of the component. A lightly-dopedlayer of the second conductivity type extends over the entire componentsurface at the interface between the lightly-doped thick area of thefirst conductivity type and the heavily-doped layer of the secondconductivity type.

According to an embodiment of the present invention, the component is atriac, including a heavily-doped area of the first conductivity typeformed on the rear surface side in the heavily-doped layer of the firstconductivity type, in which said lightly-doped layer is interrupted infront of said heavily-doped area.

According to an embodiment of the present invention, the heavily-dopedarea is provided with emitter short-circuits and portions of thelightly-doped layer are maintained in front of said emittershort-circuits.

The foregoing and other objects, features and advantages of the presentinvention, will be discussed in detail in the following non-limitingdescription of specific embodiments in connection with the accompanyingdrawings, in which:

FIG. 1 is a simplified cross-section view of a thyristor;

FIG. 2 is a simplified cross-section view of a triac;

FIG. 3 is a cross-section view of a conventional thyristor/triacperiphery structure;

FIG. 4 is a cross-section view of a structure of the periphery of athyristor/triac according to the present invention; and

FIG. 5 is a cross-section view of a structure of the periphery of atriac according to an alternative of the present invention.

As usual in the field of semiconductor representation, the variouslayers are not drawn to scale, neither in their horizontal dimensions,nor in their vertical dimensions.

FIG. 3 essentially shows the peripheral portion of a component. To theright of this drawing, the elements constitutive of a thyristor or of atriac are shown, designated by the same references as in FIGS. 1 and 2,that is, from the anode to the cathode, a P-type layer 3 extending overthe entire rear surface, a lightly-doped N-type substrate 1, a P-typewell 4 and a heavily-doped N-type region 5, within which an emittershort-circuit hole has been shown. The component periphery is occupiedby an insulating wall 2 generally formed by drive-in from the upper andlower surfaces of the substrate.

The first precaution to be taken to have a satisfactory breakdownvoltage in reverse biasing is that the lateral distance between thelimit of P-type insulating wall 2 and P-type region 4 on the uppersurface side of the substrate is at least equal to the thickness ofsubstrate 1. Further, a channel stop region 11 coated with ametallization 12 possibly extending inwards to form a field plate isgenerally provided. P-type region 4 may be surrounded with alightly-doped P-type ring 13. A contact may be taken on a moreheavily-doped portion 14 of the upper surface of wall 2, by ametallization 15 which comes back towards the inside of the componentand also forms a field plate. N+ regions 16 formed at the componentperiphery and heavily doped with phosphorus are used as getters. As canbe seen, conventional means for increasing the breakdown voltage of acomponent are essentially provided to reduce the probability forbreakdowns to occur at the level of the upper substrate surface. Indeed,this upper surface is a priori the most sensitive, the component sides(wall 2) and bottom (layer 3) forming a same equipotential surface.

However, whatever precautions are taken, a breakdown inevitably occursat a given voltage. To increase the breakdown voltage, various solutionshave been provided.

A first solution consists of increasing the substrate resistivity(decreasing its doping level), but then, the on-state resistance (Ron)of the component increases, and the sensitiveness to triggerings due toabrupt variations of the current (di/dt) upon switchings also increases.

Another solution consists of increasing the distance between the limitof the active portions (P region 4) and the insulating wall. This ofcourse has the disadvantage of increasing the chip surface area.

Another solution consists of forming a lightly-doped P-type region atthe internal periphery of the upper surface of the insulating wall,similarly to region 13. This solution, like the former, results in anincrease in the chip surface area.

Further, despite their disadvantages, these last two solutions have notbrought remarkable advantages in terms of breakdown voltage.Accordingly, the applicant has once again analyzed the reverse breakdownphenomenon of the structure and has performed various tests andsimulations to check the hypothesis made. Thus, the applicant hasconsidered that the reverse breakdown essentially occurs due to themarked curvature of the field lines in region 18 corresponding to theintersection between insulating wall 2 and lower surface P-type layer 3.

To solve this problem, as shown in FIG. 4, the present inventionprovides forming a lightly-doped P-type layer 21 at the interfacebetween lightly-doped N-type substrate 1 and heavily-doped rear surfaceP-type layer 3.

Simulations and tests performed by the applicant show that, when such alayer is used, the breakdown no longer occurs at the componentperiphery, but in a central area thereof. The maximum possible breakdownvoltage linked to the characteristics of the vertical structure of the4-layer component has thus been obtained. According to an advantage ofthe present invention, this result is obtained with no surface areaincrease as compared to the conventional structure of FIG. 3.

In a real example, while a component of the type of that in FIG. 3without P-type layer 21 has a reverse breakdown voltage on the order of1,050 volts, a component according to the present invention providedwith layer 21 has a breakdown voltage of 1,350 volts, which improvementis greater than 25%.

The only disadvantage of the presence of layer 21 in the case of athyristor is a slight increase in the on-state voltage drop, whichincreases from 1.25 to 1.32 volts under 11 amperes, that is, an increasesmaller than 5%, which is negligible in practice in most applications.

In the case where the component is a triac, it has appeared that, inaddition to this disadvantage, the triac turn-on threshold current inquadrant Q3 (positive electrode A1, negative electrode A2, negativegate) is high. To overcome this disadvantage, according to the presentinvention, as illustrated in FIG. 5, it is provided to interrupt P-typelayer 21 in front of rear surface N-type layer 7, layer 21 remainingonly outside areas located above layer 7 (see FIGS. 2 and 5). Thissolution provides good results, that is, the sensitivity in quadrant Q3is not visibly altered and the breakdown voltage is 1,220 volts, thatis, a 15% increase instead of a 25% increase is obtained.

It should be noted that the inserting of the lightly-doped P-type regionaccording to the present invention does not complicate the structuremanufacturing process. Indeed, this P-type region can be formed at thesame time as P-type region 13, just after the forming of insulatingwalls 2. P-type region 13 will for example have a surface concentrationof 10¹⁵ atoms/cm³ and a 50-μm penetration depth.

Of course, the present invention is likely to have various alterations,modifications, and improvements which will readily occur to thoseskilled in the art. All conductivity types may be inverted. The presentinvention applies to various alternatives of 4-layer components otherthan thyristors and triacs. Various improvements currently made to thecomponents may be cumulated with the present invention.

1. A 4-layer structure vertical component including a thicklightly-doped area of a first conductivity type determining a breakdownvoltage of the component, surrounded with a peripheral wall of a secondconductivity type vertically extending from one surface of the componentto the other, a heavily-doped layer of the second conductivity typeextending over an entire rear surface of the component, and alightly-doped layer of the second conductivity type extending over anentire component surface at the interface between the lightly-dopedthick area of the first conductivity type and the heavily-doped layer ofthe second conductivity type, forming a triac, including a heavily-dopedarea of the first conductivity type formed on the rear surface side inthe heavily-doped layer of the first conductivity type, wherein saidlightly-doped layer is interrupted in front of said heavily-doped area.2. The component of claim 1, wherein the heavily-doped area is providedwith emitter short-circuits and wherein portions of the lightly-dopedlayer are maintained in front of said emitter short-circuits.
 3. Avertical semiconductor component comprising: a lightly-doped substrateof a first conductivity type; a peripheral wall of a second conductivitytype surrounding the substrate and extending from a front surface to arear surface of the component; a heavily-doped layer of the secondconductivity type on the rear surface of the component; and alightly-doped layer of the second conductivity type between thesubstrate and the heavily-doped layer of the second conductivity type,comprising a triac including a region of the first conductivity typeformed in a well of the second conductivity type on the front surface ofthe component and a region of the first conductivity type formed in theheavily-doped layer of the second conductivity type.
 4. A verticalsemiconductor component as defined in claim 3, wherein the lightly-dopedlayer of the second conductivity type is interrupted near the region ofthe first conductivity type on the rear surface of the component.
 5. Avertical semiconductor component as defined in claim 4, wherein theregion of the first conductivity type on the rear surface of thecomponent is provided with emitter short circuits and wherein thelightly-doped layer of the second conductivity type is maintainedadjacent to the emitter short circuits.